The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 2025

Filed:

Nov. 02, 2023
Applicant:

Montage Lz Technologies (Shanghai) Co., Ltd., Shanghai, CN;

Inventors:

Shunfang Wu, Shanghai, CN;

Qingxiang Dong, Shanghai, CN;

Xiaomin Si, Shanghai, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/081 (2005.12); H03L 7/087 (2005.12); H03L 7/089 (2005.12);
U.S. Cl.
CPC ...
H03L 7/081 (2012.12); H03L 7/087 (2012.12); H03L 7/0895 (2012.12);
Abstract

Disclosed is a phase-locked loop device. The phase-locked loop device includes a frequency-locked loop circuit and a phase-locked loop circuit. The frequency-locked loop circuit includes a delay generator circuit and a frequency-phase detector. The delay generator circuit generates a ramp signal based on the feedback clock signal, and compares the ramp signal with multiple reference voltages to generate multiple delayed feedback clock signals. The frequency-phase detector has a dead zone control mechanism that generates a locking signal based on phases of the reference clock signal and delayed feedback clock signal and automatically switches on/off the dead zone. The phase-locked loop circuit generates the first output current according to the phase difference between the reference clock signal and the feedback clock signal.


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