The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 2025

Filed:

Jun. 15, 2023
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Jung Min Choi, Icheon-si, KR;

Sun Woong Kim, Icheon-si, KR;

Byung Il Koh, Icheon-si, KR;

Min Ho Ha, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2005.12);
U.S. Cl.
CPC ...
G06F 3/0608 (2012.12); G06F 3/0631 (2012.12); G06F 3/0652 (2012.12); G06F 3/0659 (2012.12);
Abstract

A memory system includes at least one memory device that includes memory areas. The memory system includes a device allocation manager and security erase circuitry. The device allocation manager determines which of the memory areas is allocated or released based on a request input from at least one host. The security erase circuitry stores a security erase task for a first memory area, which is associated with a release determined by the device allocation manager, in an erase job queue, and removes the security erase task from the erase job queue when the first memory area is reallocated to a first host to which the first memory area was allocated before the release.


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