Dynamic random access memory-based content-addressable memory (dram-cam) architecture for exact pattern matching

Abstract

Disclosed herein is a Dynamic Random Access Memory-Based Content-Addressable Memory (DRAM-CAM) architecture and methods relating thereto. The DRAM-CAM architecture can include a memory array, with the data organized into blocks including rows and columns. Input data can be converted into a format with first and second groups of columns. Each first group can correspond to one or more rows of the input data, and each second group can include one or more null columns. A query can be received and loaded into an available column of the second group, and pattern matching can be performed on the data to identify occurrences of elements defined by the query. The pattern matching can be performed concurrently on the first groups of columns and the available columns bit by bit. Results can include a count or location of each identified element.