The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 29, 2025

Filed:

Feb. 07, 2022
Applicant:

X Development Llc, Mountain View, CA (US);

Inventors:

Raj Apte, Palo Alto, CA (US);

Cyrus Behroozi, Menlo Park, CA (US);

Zhigang Pan, Austin, TX (US);

Dino Ruic, Santa Clara, CA (US);

Assignee:

X Development LLC, Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05B 19/18 (2005.12); G05B 13/02 (2005.12);
U.S. Cl.
CPC ...
G05B 19/188 (2012.12); G05B 13/0265 (2012.12); G05B 2219/45031 (2012.12);
Abstract

Systems, computer-implemented methods, and instructions encoded in machine-accessible storage media are provided for determining manufacturability of an integrated circuit layout. A computer-implemented method includes receiving a layout describing the integrated circuit to be manufactured by a semiconductor manufacturing process. The method also includes generating a differentiable manufacturability parameter as an output of a machine learning model using the layout, the machine learning model being trained to generate the differentiable manufacturability parameter. The differentiable manufacturability parameter describes the manufacturability of the integrated circuit by the semiconductor manufacturing process.


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