The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 21, 2025
Filed:
Jun. 14, 2022
Seagate Technology Llc, Fremont, CA (US);
Jon D. Trantham, Chanhassen, MN (US);
Praveen Viraraghavan, Chicago, IL (US);
John W. Dykes, Eden Prairie, MN (US);
Ian J. Gilbert, Chanhassen, MN (US);
Sangita Shreedharan Kalarickal, Eden Prairie, MN (US);
Matthew J. Totin, Excelsior, MN (US);
Mohamad El-Batal, Superior, CO (US);
Darshana H. Mehta, Shakopee, MN (US);
SEAGATE TECHNOLOGY LLC, Fremont, CA (US);
Abstract
Apparatus and method for managing data in a non-volatile memory (NVM) having an array of ferroelectric memory cells (FMEs). A data set received from an external client device is programmed to a group of the FMEs at a target location in the NVM using a selected profile. The selected profile provides different program characteristics, such as applied voltage magnitude and pulse duration, to achieve desired levels of power used during the program operation, endurance of the data set, and latency effects associated with a subsequent read operation to retrieve the data set. The profile may be selected from among a plurality of profiles for different operational conditions. The ferroelectric NVM may form a portion of a solid-state drive (SSD) storage device. Different types of FMEs may be utilized including ferroelectric tunneling junctions (FTJs), ferroelectric random access memory (FeRAM), and ferroelectric field effect transistors (FeFETs).