The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 21, 2025

Filed:

Sep. 21, 2023
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Hithesh Hassan Lepaksha, Hyderabad, IN;

Sharath Kumar Nagilla, Hyderabad, IN;

Darshan Kumar Nandanwar, Bangalore, IN;

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2017.12); G06F 9/38 (2017.12); G06F 15/78 (2005.12); G06F 15/80 (2005.12);
U.S. Cl.
CPC ...
G06F 15/7825 (2012.12); G06F 9/3836 (2012.12); G06F 9/3858 (2023.07); G06F 15/7807 (2012.12); G06F 15/8076 (2012.12);
Abstract

A method of execution unit (EU) sharing between processor cores is described. The method includes encountering a structural hazard associated with an issued instruction in an instruction queue of a dispatch stage inside an active processor core. The method also includes issuing a request for an idle execution unit of an inactive processor core. The method further includes sending a transaction containing source operands of the issued instruction, and a word address of a result buffer as a destination operand to an allocated EU of the inactive processor core. The method also includes replacing the issued instruction in the instruction queue with a load operation to forward a result of the issued instruction from the result buffer based on the word address.


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