The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2025
Filed:
Sep. 27, 2022
Applicant:
Western Digital Technologies, Inc., San Jose, CA (US);
Inventors:
Liang Li, Shanghai, CN;
Xuan Tian, Shanghai, CN;
Zhen Qin, Shanghai, CN;
Yanli Zhang, San Jose, CA (US);
Yan Li, Milpitas, CA (US);
Assignee:
Sandisk Technologies, Inc., Milpitas, CA (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 43/27 (2022.12); G11C 5/10 (2005.12); G11C 11/24 (2005.12); G11C 16/04 (2005.12); G11C 16/30 (2005.12); H10B 43/10 (2022.12); H10B 43/40 (2022.12); H10B 41/27 (2022.12);
U.S. Cl.
CPC ...
H10B 43/27 (2023.01); G11C 5/10 (2012.12); G11C 11/24 (2012.12); G11C 16/0483 (2012.12); G11C 16/30 (2012.12); H10B 43/40 (2023.01); G11C 2213/75 (2012.12); H10B 43/10 (2023.01);
Abstract
A stack of alternating layers of dielectric and conductive materials are formed on a substrate. A first portion of the stack of alternating layers forms a plurality of blocks of NAND memory. A second portion of the stack of alternating layers forms a configurable capacitor structure. The configurable capacitor structure is configurable to form one or more capacitors of configurable capacitance.