The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2025

Filed:

Mar. 26, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sangyoun Jo, Suwon-si, KR;

Kohji Kanamori, Seongnam-si, KR;

Kwangyoung Jung, Hwaseong-si, KR;

Jeehoon Han, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 41/27 (2022.12); H01L 23/522 (2005.12); H01L 23/528 (2005.12); H10B 41/10 (2022.12); H10B 41/40 (2022.12); H10B 43/10 (2022.12); H10B 43/27 (2022.12); H10B 43/40 (2022.12);
U.S. Cl.
CPC ...
H10B 41/27 (2023.01); H01L 23/5226 (2012.12); H01L 23/528 (2012.12); H10B 41/10 (2023.01); H10B 41/40 (2023.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01); H10B 43/40 (2023.01);
Abstract

A semiconductor device includes a substrate including a first plate portion and a second plate portion, a stack structure including interlayer insulating layers and gate electrodes alternately stacked on the substrate, a first block separation structure on the first plate portion and a second block separation structure on the first plate portion. Each of the first and second block separation structures includes first separation regions, a cell array separation structure including a second separation region connected to the first separation regions and channel structures penetrating the stack structure, wherein the stack structure includes first stack structures separated by the first separation regions of the first block separation structure and extending in the first direction, second stack structures separated by the first separation regions of the second block separation structure, and at least one third stack structure separated from the first and second stack structures by the cell array separation structure.


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