The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2025

Filed:

Dec. 07, 2021
Applicant:

Ablic Inc., Tokyo, JP;

Inventors:

Takashi Matsuda, Tokyo, JP;

Takashi Ono, Tokyo, JP;

Assignee:

ABLIC Inc., Nagano, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2005.12); G01R 19/165 (2005.12);
U.S. Cl.
CPC ...
H02J 7/007182 (2019.12); G01R 19/16538 (2012.12); H02J 7/00302 (2019.12); H02J 7/00304 (2019.12); H02J 7/00309 (2019.12); H02J 7/0032 (2012.12); H02J 7/0048 (2019.12); H02J 7/0063 (2012.12); H02J 7/007192 (2019.12);
Abstract

Operational instability is prevented without compromising the state transition speed. A mask control circuit is a circuit which generates a mask signal masking a control signal during a period in which a voltage level of a monitoring target terminal to be monitored is transitioning. The mask control circuit includes: a first input port which receives a signal supplied to the monitoring target terminal; a second input port which receives a signal representing the voltage level of the monitoring target terminal; a logic circuit which determines whether the voltage level of the monitoring target terminal is in transition based on signals received from the first input port and the second input port; and an output port which outputs a signal indicating a determination result of whether the voltage level of the monitoring target terminal is in transition as the mask signal.


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