The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2025

Filed:

Jun. 05, 2022
Applicant:

Airoha Technology (Hk) Limited, North Point, HK;

Inventors:

Chun-Wei Chen, Hsinchu County, TW;

Yan-Bin Luo, Taipei, TW;

Ming-Yin Ko, Hsinchu County, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2005.12); H01L 23/498 (2005.12);
U.S. Cl.
CPC ...
H01L 24/32 (2012.12); H01L 23/49811 (2012.12); H01L 23/49833 (2012.12); H01L 24/29 (2012.12); H01L 24/48 (2012.12); H01L 24/73 (2012.12); H01L 2224/2919 (2012.12); H01L 2224/32057 (2012.12); H01L 2224/32225 (2012.12); H01L 2224/48225 (2012.12); H01L 2224/73265 (2012.12); H01L 2924/0781 (2012.12); H01L 2924/1204 (2012.12);
Abstract

A semiconductor package includes a printed circuit board (PCB), a semiconductor device, an interposer, and a conductive adhesive. The PCB has a top surface with at least one ground area formed thereon. The semiconductor device has a bottom surface with at least one first first-type contact formed thereon. The interposer is located between the semiconductor device and the PCB. The bottom surface of the semiconductor device is adhered to a top surface of the interposer by the conductive adhesive. The conductive adhesive overflows from an edge of the top surface of the interposer to have contact with the at least one ground area on the top surface of the PCB.


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