Integrated structure having a p-type semiconductor diffusion barrier layer forming a van der waals junction with a p-type substrate and electronic device including the same

Abstract

An integrated structure according to a preferred embodiment may include a silicon or silicon-on-insulator (SOI) substrate, a conductive layer spaced apart from the substrate and including a metal or a metal compound, and a diffusion barrier layer provided therebetween. The substrate and the diffusion barrier layer may directly contact and form a van der Waals junction. Since the diffusion barrier layer may block diffusion of metal atoms into the substrate lattice by blocking movement of materials (atoms) between the substrate and the conductive layer and may also control injection of holes from the conductive layer toward the substrate, defects at the metal-semiconductor interface may be controlled to overcome the limitations of ultra-fine and highly integrated semiconductors.