The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2025
Filed:
Feb. 14, 2021
Pensando Systems Inc., Milpitas, CA (US);
Chaitanya Huilgol, Bangalore, IN;
J. Bradley Smith, San Jose, CA (US);
Allen Hubbe, Durham, NC (US);
Balakrishnan Raman, Fremont, CA (US);
Harinadh Nagulapalli, San Jose, CA (US);
Krishna Doddapaneni, Cupertino, CA (US);
Murty Subba Rama Chandra Kotha, San Jose, CA (US);
Varada Raja Kumar Kari, Bengaluru, IN;
Pensando Systems Inc., Milpitas, CA (US);
Abstract
SR-IOV (single root IO virtualization) capable PCIe devices can implement virtual functions (VFs) that are assigned to VMs running on a host machine, thereby speeding IO operation by writing directly to the VMs' memory while bypassing the hypervisor managing the VMs. As such, VFs thwart the dirty page tracking that hypervisors use to minimize VM downtime when the VM is migrated between hosts. The SR-IOV PCIe devices can help resolve this problem by maintaining dirty page tracking data for VMs running on the host machine. The SR-IOV PCIe devices bypassing the hypervisor while writing into a memory page of the VM can set the dirty page tracking data to indicate the memory pages that are dirty (i.e., written to by the VF), and can provide access to the dirty page tracking data. The hypervisor can thereby obtain and use the dirty page tracking data.