The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2025

Filed:

Sep. 12, 2023
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Kei Akiyama, Yokohama, JP;

Iris Lu, Fremont, CA (US);

Yoshito Katano, Fujisawa, JP;

Tai-Yuan Tseng, Milpitas, CA (US);

Assignee:

Sandisk Technologies, Inc., Milpitas, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2005.12); G11C 7/08 (2005.12);
U.S. Cl.
CPC ...
G06F 3/0659 (2012.12); G06F 3/0604 (2012.12); G06F 3/0634 (2012.12); G06F 3/0679 (2012.12); G11C 7/08 (2012.12);
Abstract

An apparatus is provided that includes a memory structure including non-volatile memory cells, a first processor and a second processor. The first processor is configured to provide a plurality of sets of commands to a second processor to perform memory operations on the non-volatile memory cells. The second processor is configured to execute the sets of commands and provide a control signal to the first processor. The first processor is further configured to provide the sets of commands to the second processor based on a status of the control signal. The second processor is further configured to control the status of the control signal so that the second processor executes sets of commands with no idle time between consecutive sets of commands.


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