The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 14, 2025
Filed:
Sep. 21, 2023
Samsung Electronics Co., Ltd., Suwon-si, KR;
Jeong Hoan Park, Suwon-si, KR;
Yeon Soo Kwon, Suwon-si, KR;
Hancheon Yun, Suwon-si, KR;
Jungyu Lee, Suwon-si, KR;
Jaeseung Jeong, Suwon-si, KR;
Samsung Electronics Co., Ltd., Gyeonggi-Do, KR;
Abstract
An error correction circuit includes a clock delay circuit configured to receive an input clock, delay the input clock by a desired time period to generate a delayed clock, and output one of the input clock and the delayed clock as an output clock in response to a select signal, an error detection circuit configured to, receive the output clock and input data, generate output data and latch data based on the output clock and the input data, and detect a margin error based on the output data and the latch data, and a control circuit configured to correct the detected margin error, the correcting the margin error including adjusting a level of the select signal based on whether the margin error has been detected.