The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2025

Filed:

Jan. 08, 2024
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Byounghak Hong, Albany, NY (US);

Seunghyun Song, Albany, NY (US);

Myunggil Kang, Hwaseong-si, KR;

Kang-Ill Seo, Albany, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 86/00 (2025.01); G01R 27/02 (2006.01); H01L 21/66 (2006.01); H01L 23/535 (2006.01); H10D 30/67 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01); H10D 88/00 (2025.01);
U.S. Cl.
CPC ...
H10D 86/201 (2025.01); G01R 27/02 (2013.01); H01L 23/535 (2013.01); H10D 86/215 (2025.01);
Abstract

Resistance measuring structures for a stacked integrated circuit device are provided. The resistance measuring structures may include a first Complementary Field Effect Transistor (CFET) stack, a second CFET stack, and a conductive connection. The first CFET may include a first upper transistor that includes a first upper drain region and a first lower transistor that is between the substrate and the first upper transistor and includes a first lower drain region. The second CFET may include a second upper transistor that includes a second upper drain region and a second lower transistor that is between the substrate and the second upper transistor and includes a second lower drain region. The conductive connection may electrically connect the first upper drain region and the second upper drain region.


Find Patent Forward Citations

Hong, Byounghak. (2025). Resistance measuring structures of stacked devices (U.S. Patent No. 12274092). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12274092

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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