The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2025

Filed:

May. 15, 2024
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;

Inventor:

Jun Koyama, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 5/06 (2006.01); G11C 5/14 (2006.01); G11C 8/04 (2006.01); H01L 21/8258 (2006.01); H01L 27/06 (2006.01); H01L 27/088 (2006.01); H01L 27/12 (2006.01); H01L 29/04 (2006.01); H01L 29/786 (2006.01); H03K 3/012 (2006.01); H03K 3/037 (2006.01); H03K 19/00 (2006.01); H01L 21/8234 (2006.01);
U.S. Cl.
CPC ...
H03K 3/012 (2013.01); G11C 5/147 (2013.01); G11C 8/04 (2013.01); H01L 21/8258 (2013.01); H01L 27/0629 (2013.01); H01L 27/088 (2013.01); H01L 27/1225 (2013.01); H01L 29/045 (2013.01); H01L 29/7869 (2013.01); H01L 29/78693 (2013.01); H03K 3/0372 (2013.01); H03K 3/0375 (2013.01); H03K 19/0008 (2013.01); H01L 21/823412 (2013.01);
Abstract

Provided is a semiconductor device including a sequential circuit including a first transistor and a capacitor. The first transistor includes a semiconductor layer including indium, zinc, and oxygen to form a channel formation region. A node electrically connected to a source or a drain of the first transistor and a capacitor becomes a floating state when the first transistor turns off, so that a potential of the node can be maintained for a long period. A power-gating control circuit may be provided to control supply of power supply potential to the sequential circuit. The potential of the node still can be maintained while supply of the power supply potential is stopped.


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