The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 08, 2025
Filed:
Nov. 02, 2023
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Jin-Ook Song, Seoul, KR;
Yun-Ju Kwon, Yongin-si, KR;
Dong-Sik Cho, Yongin-si, KR;
Byung-Tak Lee, Yongin-si, KR;
Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 1/3225 (2019.01); G06F 1/3234 (2019.01); G06F 1/3287 (2019.01); G06F 1/3296 (2019.01); G06F 15/78 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3225 (2013.01); G06F 1/3275 (2013.01); G06F 1/3287 (2013.01); G06F 1/3296 (2013.01); G06F 15/7821 (2013.01); G11C 5/14 (2013.01);
Abstract
A system on chip (SoC) adjusts power of a memory through a handshake. The SoC includes a memory controller and a power manager. The memory controller is configured to control a memory. The power manager is configured to manage a supply power level of the memory. The memory controller is configured to output, to the power manager, a memory access level indicating a frequency of accesses to the memory. The power manager is configured to adjust the supply power level of the memory according to the memory access level.