The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 08, 2025

Filed:

Jul. 30, 2021
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Benjamin Tsien, Santa Clara, CA (US);

Indrani Paul, Austin, TX (US);

Alexander J. Branover, Boxborough, MA (US);

Thomas J. Gibney, Boxborough, MA (US);

Mihir Shaileshbhai Doctor, Santa Clara, CA (US);

John P. Petry, Santa Clara, CA (US);

Stephen V. Kosonocky, Fort Collins, CO (US);

Christopher T. Weaver, Boxborough, MA (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/24 (2006.01); G06F 1/3203 (2019.01); G06F 9/4401 (2018.01);
U.S. Cl.
CPC ...
G06F 1/3203 (2013.01); G06F 9/4401 (2013.01);
Abstract

Systems, methods, and devices for integrated circuit power management. A mode of a power management state is entered, from the power management state, in response to an entry condition of the mode. A device that is otherwise powered off in the power management state is powered on in the mode of the power management state. In some implementations, the device includes a communications path between a second device and a third device. In some implementations, the device is in a power domain that is powered off in the power management state. In some implementations, the power domain is powered off in the mode. In some implementations, the device is powered on in the mode via a power rail that is specific to the mode. In some implementations, the entry condition of the mode includes an amount of data stored for display in a display buffer falling below a threshold amount.


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