The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2025

Filed:

Dec. 14, 2020
Applicant:

Telefonaktiebolaget Lm Ericsson (Publ), Stockholm, SE;

Inventors:

Mohammed Abdulaziz, Lund, SE;

Henrik Sjöland, Lund, SE;

Tony Påhlsson, Lund, SE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/095 (2006.01); H03L 7/087 (2006.01);
U.S. Cl.
CPC ...
H03L 7/095 (2013.01); H03L 7/087 (2013.01); H03L 2207/50 (2013.01);
Abstract

An apparatus is disclosed for provision of an indication of an angular difference between first and second input signals. The apparatus comprises a phase frequency detector (PFD) configured to receive the first and second input signals and to provide first and second outputs based on the first and second input signals. A difference in pulse length between signals provided at the first and second outputs is indicative of the phase difference between the first and second input signals. The apparatus also comprises first and second time-to-digital converters (TDCs) each configured to receive one of the signals provided by the PFD and to provide a corresponding digital pulse length representation. Each of the TDCs is a pulse length modifying TDC, wherein pulse length modification may comprise pulse length shrinking or pulse length extension. The apparatus also comprises a comparator configured to provide the indication of the phase difference based on the digital pulse length representations provided by the first and second TDCs. Corresponding digital phase-locked loop (DPLL) and communication device are also disclosed.


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