The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2025

Filed:

Nov. 28, 2022
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jaewon Park, Suwon-si, KR;

Sukhan Lee, Suwon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/46 (2006.01); G11C 29/12 (2006.01); G11C 29/36 (2006.01);
U.S. Cl.
CPC ...
G11C 29/46 (2013.01); G11C 29/12005 (2013.01); G11C 29/36 (2013.01); G11C 2029/3602 (2013.01);
Abstract

Provided is a memory device including a cell array, a peripheral circuit configured to control a memory operation of the plurality of memory cells, a test logic circuit configured to operate in a test mode and configured to perform a test operation on the plurality of memory cells, a first regulator configured to regulate a first power supply voltage received through a first pad and provide the first power supply voltage to at least one of the cell array and the peripheral circuit, and a power manager between the first pad and an input terminal of the first regulator, and between the first pad and the test logic circuit and configured to provide a test power supply voltage to the test logic circuit. In the test mode, while a first target voltage level of the first regulator fluctuates, a second target voltage level of the power manager is maintained constant.


Find Patent Forward Citations

Loading…