The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 01, 2025

Filed:

May. 01, 2023
Applicant:

Qorvo Us, Inc., Greensboro, NC (US);

Inventors:

Alexandru Aurelian Ciubotaru, Coconut Creek, FL (US);

Jeroen Kuenen, Beuningen, NL;

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 27/26 (2006.01); H03B 5/24 (2006.01);
U.S. Cl.
CPC ...
G01R 27/2605 (2013.01); H03B 5/24 (2013.01); H03B 2200/004 (2013.01);
Abstract

An on-chip capacitance measurement method and associated systems and devices are provided. Embodiments described herein rely on using the capacitor under test in an on-chip relaxation oscillator configuration whose charging/discharging currents, supply voltage, and output frequency are measured individually in a measurement block. The voltage thresholds of the relaxation oscillation are calculated from the circuit elements and the measured supply voltage. Because the oscillation frequency of the relaxation oscillator is a function of the capacitance under test, the charging/discharging currents, and the supply voltage (via voltage thresholds), the capacitance under test can be calculated using the measured values of the other quantities. Embodiments described herein provide an accurate, low-power, small-area on-chip system capable of measuring capacitance with high accuracy. An algorithm employing the above method and apparatus for tuning a crystal oscillator is also provided. Relevant circuit implementations used in the on-chip measurement system are also disclosed.


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