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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12262598 B1

PDFFull Text
Date of Patent:
Mar. 25, 2025

Filed:

Oct. 11, 2023

Display device and method of manufacturing the display device

Applicant:

Samsung Display Co., Ltd., Yongin-Si, KR;

Inventors:

Jaybum Kim, Yongin-si, KR;

Myeongho Kim, Yongin-si, KR;

Yeonhong Kim, Yongin-si, KR;

Kyoungseok Son, Yongin-si, KR;

Seungjun Lee, Yongin-si, KR;

Seunghun Lee, Yongin-si, KR;

Junhyung Lim, Yongin-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:

Innovation Counsel LLP

Primary Examiner:

Victoria K Hall

Int. Cl.
CPC ...
H10K 59/124 (2023.01); H01L 27/12 (2006.01); H10K 59/121 (2023.01); H10K 71/00 (2023.01); H01L 25/16 (2023.01); H01L 25/18 (2023.01); H10K 59/12 (2023.01); H10K 59/65 (2023.01);
U.S. Cl.
CPC ...
H10K 59/124 (2023.02); H01L 27/1225 (2013.01); H01L 27/1251 (2013.01); H01L 27/1255 (2013.01); H10K 59/1213 (2023.02); H10K 59/1216 (2023.02); H10K 71/00 (2023.02); H01L 25/167 (2013.01); H01L 25/18 (2013.01); H10K 59/1201 (2023.02); H10K 59/121 (2023.02); H10K 59/65 (2023.02);
Abstract

A display device is disclosed that includes: a substrate comprising a display area and a component area including a transmission area; a first thin-film transistor comprising a first semiconductor layer and a first gate electrode, the first semiconductor layer including a silicon semiconductor; a first insulating layer covering the first gate electrode; a second thin-film transistor comprising a second semiconductor layer arranged on the first insulating layer and a second gate electrode, the second semiconductor layer including an oxide semiconductor; a second insulating layer covering the second gate electrode and having a transmission hole overlapping the transmission area; an intermediate insulating layer between the first insulating layer and the second insulating layer; a conductive pattern between the intermediate insulating layer and the first insulating layer; and a display element arranged on the second insulating layer, wherein the transmission hole exposes an upper surface of the intermediate insulating layer.

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