The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2025
Filed:
Mar. 02, 2023
Qualcomm Incorporated, San Diego, CA (US);
John Abcarius, San Diego, CA (US);
Debesh Bhatta, San Diego, CA (US);
Andrew Weil, San Diego, CA (US);
Robert Martin Ondris, San Diego, CA (US);
Wenjing Yin, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
Certain aspects of the present disclosure provide a relatively compact frequency-locked loop (FLL) using a discrete-time integrator. For certain aspects, the FLL also includes a supplemental oscillator and other circuitry that allows for saving the FLL frequency when a reference clock will be disconnected, maintaining a similar frequency during disconnection, and restoring the FLL frequency when the reference clock is reconnected. One example FLL circuit generally includes: an encoder; a combiner comprising a first input coupled to an output of the encoder; a digital-to-analog converter (DAC) comprising an input coupled to an output of the combiner; a discrete-time integrator comprising an input coupled to an output of the DAC; a voltage-controlled oscillator (VCO) comprising a control input coupled to an output of the discrete-time integrator; and a counter comprising an input coupled to an output of the VCO and comprising an output coupled to a second input of the combiner.