The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 25, 2025
Filed:
Oct. 29, 2023
Novatek Microelectronics Corp., Hsinchu, TW;
Chin-Tung Chan, New Taipei, TW;
Yan-Ting Wang, Hsinchu County, TW;
Ren-Hong Luo, Hsinchu, TW;
Chih-Wen Chen, Hsinchu County, TW;
Hao-Che Hsu, Kaohsiung, TW;
Li-Wei Lin, Hsinchu, TW;
NOVATEK Microelectronics Corp., Hsinchu, TW;
Abstract
A frequency locked loop circuit, comprising an operational circuit, a first impedance circuit, a second impedance circuit, a switching circuit and a frequency generation circuit. The operational circuit is configured to output an operational signal according to a voltage difference between a positive terminal and a negative terminal. The switching circuit is configured to periodically conduct the negative terminal to one of the first impedance node and the second impedance node, and periodically conduct the positive terminal to the other one of the first impedance node and the second impedance node. The frequency generation circuit is configured to periodically sample the operational signal to generate a sample signal to generate a clock signal. An operational frequency of the operational signal is an integer multiple of a sampling frequency of the frequency generation circuit.