The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2025

Filed:

Dec. 02, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-si, KR;

Inventors:

Jaybum Kim, Seoul, KR;

Eoksu Kim, Seoul, KR;

Kyoungseok Son, Seoul, KR;

Junhyung Lim, Seoul, KR;

Jihun Lim, Hwaseong-si, KR;

Assignee:

SAMSUNG DISPLAY CO., LTD., Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10K 50/805 (2023.01); G09G 3/32 (2016.01); G09G 3/3233 (2016.01); H10B 10/00 (2023.01); H10K 50/30 (2023.01); H10K 59/12 (2023.01); H10K 59/121 (2023.01); H10K 71/00 (2023.01); H10K 77/10 (2023.01);
U.S. Cl.
CPC ...
H10K 50/805 (2023.02); G09G 3/32 (2013.01); G09G 3/3233 (2013.01); H10B 10/125 (2023.02); H10K 59/1213 (2023.02); H10K 77/10 (2023.02); G09G 2300/0426 (2013.01); G09G 2300/0814 (2013.01); G09G 2300/0842 (2013.01); G09G 2300/0861 (2013.01); G09G 2300/0866 (2013.01); G09G 2310/0245 (2013.01); G09G 2310/0262 (2013.01); H10K 50/30 (2023.02); H10K 59/1201 (2023.02); H10K 59/1216 (2023.02); H10K 71/621 (2023.02);
Abstract

A display device includes a base substrate, a first transistor, a second transistor, an organic light emitting diode, and a capacitor electrically connected to the first thin film transistor. The first transistor includes a first semiconductor pattern below a first interlayer insulation layer and a first control electrode above the first interlayer insulation layer and below a second interlayer insulation layer. The second transistor includes a second control electrode above the first interlayer insulation layer and below the second interlayer insulation layer. A second semiconductor pattern is above the second interlayer insulation layer.


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