The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 18, 2025
Filed:
Apr. 16, 2024
Applicant:
Nanya Technology Corporation, New Taipei, TW;
Inventor:
Kuo-Hui Su, Taipei, TW;
Assignee:
NANYA TECHNOLOGY CORPORATION, New Taipei, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 64/01 (2025.01); H01L 21/768 (2006.01); H01L 23/528 (2006.01); H01L 23/532 (2006.01); H10D 64/27 (2025.01); H10D 64/68 (2025.01);
U.S. Cl.
CPC ...
H10D 64/01 (2025.01); H01L 21/76846 (2013.01); H01L 21/76858 (2013.01); H01L 21/76867 (2013.01); H01L 23/5283 (2013.01); H01L 23/53238 (2013.01); H10D 64/513 (2025.01); H10D 64/685 (2025.01); H10D 64/693 (2025.01);
Abstract
A method for preparing a recessed gate structure includes forming a recessed structure, wherein the recessed structure includes a substrate with the recess extending into the substrate from a topmost surface of the substrate; forming a first functional layer to at least cover a sidewall of a recess of the recessed structure; forming a second functional layer to cover the first functional layer; performing a rapid thermal treatment to form an interfacial layer extending along an interface between the first functional layer and the second functional layer; and forming a conductive feature to fill up the recess.