The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2025

Filed:

Dec. 22, 2022
Applicant:

Inertech Ip Llc, Plano, TX (US);

Inventor:

Subrata K. Mondal, South Windsor, CT (US);

Assignee:

INERTECH IP LLC, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02J 3/32 (2006.01); H02J 3/18 (2006.01); H02J 7/34 (2006.01); H02M 1/00 (2007.01); H02M 7/483 (2007.01);
U.S. Cl.
CPC ...
H02J 3/32 (2013.01); H02J 3/1857 (2013.01); H02M 7/483 (2013.01); H02M 7/4837 (2021.05); H02J 7/345 (2013.01); H02M 1/007 (2021.05); Y02E 40/10 (2013.01); Y02E 40/20 (2013.01); Y02E 60/10 (2013.01); Y02E 60/13 (2013.01);
Abstract

Systems and methods for supplying power (both active and reactive) at a medium voltage from a DCSTATCOM to an IT load without using a transformer are disclosed. The DCSTATCOM includes an energy storage device, a two-stage DC-DC converter, and a multi-level inverter, each of which are electrically coupled to a common negative bus. The DC-DC converter may include two stages in a bidirectional configuration. One stage of the DC-DC converter uses a flying capacitor topology. The voltages across the capacitors of the flying capacitor topology are balanced and switching losses are minimized by fixed duty cycle operation. The DC-DC converter generates a high DC voltage from a low or high voltage energy storage device such as batteries and/or ultra-capacitors. The multi-level, neutral point, diode-clamped inverter converts the high DC voltage into a medium AC voltage using a space vector pulse width modulation (SVPWM) technique.


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