The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2025

Filed:

Apr. 08, 2022
Applicants:

Denso Corporation, Kariya, JP;

Toyota Jidosha Kabushiki Kaisha, Toyota, JP;

Mirise Technologies Corporation, Nisshin, JP;

Inventors:

Eiji Kagoshima, Nisshin, JP;

Yohei Iwahashi, Nisshin, JP;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/10 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4236 (2013.01); H01L 29/1095 (2013.01); H01L 29/42364 (2013.01); H01L 29/66727 (2013.01); H01L 29/7813 (2013.01);
Abstract

A method for manufacturing a switching device includes: forming a trench at a top surface of a semiconductor substrate; forming a gate insulation film for covering an inner surface of the trench; forming a gate electrode inside the trench to locate a top surface of the gate electrode below the top surface of the semiconductor substrate; forming an oxide film by oxidizing the top surface of the gate electrode; forming an interlayer insulation film by vapor phase growth at a top surface of the oxide film to locate a top surface of the interlayer insulation film below the top surface of the semiconductor substrate; and forming an upper electrode in contact with the semiconductor substrate at the top surface of the semiconductor substrate and a side surface of the trench located above the top surface of the interlayer insulation film.


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