The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 18, 2025

Filed:

Oct. 18, 2023
Applicant:

Preferred Networks, Inc., Tokyo, JP;

Inventor:

Nobuyoshi Tanaka, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); G06F 11/10 (2006.01); H01L 23/00 (2006.01); H01L 23/06 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/433 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5386 (2013.01); G06F 11/1068 (2013.01); H01L 23/06 (2013.01); H01L 23/3128 (2013.01); H01L 23/367 (2013.01); H01L 23/433 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 25/0655 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/17179 (2013.01);
Abstract

A semiconductor device includes a first chip, a second chip, a third chip, and a fourth chip. The first chip is placed adjacent to the second chip and the fourth chip. The third chip is placed adjacent to the second chip and the fourth chip at a position different from a position of the first chip. Data of the first chip is transferred from the first chip to the third chip via the second chip. Data of the third chip is transferred from the third chip to the first chip via the fourth chip. The data transferred from the first chip to the second chip is transferred via a wiring layer formed over a silicon and placed at a position different from positions of the first chip, the second chip, the third chip, and the fourth chip.


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