The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2025

Filed:

Apr. 13, 2021
Applicant:

Nokia Solutions and Networks Oy, Espoo, FI;

Inventors:

David North, Santa Clara, CA (US);

Daniel Anav, San Jose, CA (US);

David Harvey, Stittsville, CA;

Scott David Dsouza, Stittsville, CA;

Alex Chan, Ottawa, CA;

Paul James Brown, Wakefiled, CA;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 3/00 (2006.01); H05K 3/34 (2006.01);
U.S. Cl.
CPC ...
H05K 1/117 (2013.01); H05K 1/113 (2013.01); H05K 3/0026 (2013.01); H05K 3/0044 (2013.01); H05K 3/3405 (2013.01); H05K 2201/10446 (2013.01); H05K 2203/0228 (2013.01);
Abstract

A printed circuit board for mounting electrical components thereupon include: a first side; a second side opposite the first side; electrical connection points disposed on the surface of an exterior edge of the printed circuit board; and wherein the exterior edge of the printed circuit board is between the first side and the second side. Further a method of manufacturing a printed circuit board for mounting electrical components thereupon includes the steps of disposing interconnect structures within the printed circuit board adjacent to at least one edge of the printed circuit board; and removing material from the printed circuit board edge to expose the interconnect structures such that the exposed interconnect structures correspond to a component connection footprint.


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