The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2025
Filed:
Nov. 15, 2023
Applicant:
Ciena Corporation, Hanover, MD (US);
Inventors:
Jacob Pike, Ottawa, CA;
Naim Ben-Hamida, Ottawa, CA;
Jerry Yee-Tung Lam, Markham, CA;
Euhan Chong, Kanata, CA;
David Berton, Ottawa, CA;
Assignee:
CIENA CORPORATION, Hanover, MD (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K 21/17 (2006.01); H03K 3/017 (2006.01); H03K 21/40 (2006.01); H03L 7/08 (2006.01);
U.S. Cl.
CPC ...
H03K 3/017 (2013.01); H03K 21/17 (2013.01); H03K 21/40 (2013.01); H03L 7/0807 (2013.01);
Abstract
Aspects of the subject disclosure may include, for example, an inner clock generation circuit, including: a selectable frequency divider having: a ring of tri-state inverters; a reset gate on an output of each tri-state inverter in the ring; and a reset circuit comprising one or more selectable flip-flops; and a duty-cycle limiter that generates clock signals having a 25% duty cycle from three out of four quadrature clock signals. Other embodiments are disclosed.