The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2025
Filed:
Apr. 29, 2024
Applicant:
Qualcomm Incorporated, San Diego, CA (US);
Inventors:
Yung-Chung Lo, San Diego, CA (US);
Hyejeong Song, San Diego, CA (US);
Bhushan Shanti Asuri, San Diego, CA (US);
Sahar Nozari, San Diego, CA (US);
Assignee:
QUALCOMM Incorporated, San Diego, CA (US);
Primary Examiner:
Int. Cl.
CPC ...
H04B 1/40 (2015.01); H03F 1/02 (2006.01); H03F 3/193 (2006.01); H03F 3/21 (2006.01); H03F 3/24 (2006.01);
U.S. Cl.
CPC ...
H03F 3/245 (2013.01); H03F 1/0211 (2013.01); H04B 1/40 (2013.01); H03F 2200/294 (2013.01); H03F 2200/451 (2013.01);
Abstract
A load line impedance modulation circuit includes a magnetic circuit, an adjustable capacitance coupled to an output of the magnetic circuit, and a plurality of adjustable resistances coupled to the output of the magnetic circuit, wherein the plurality of adjustable resistances are configured to select from available output ports, an impedance presented by the load line impedance modulation circuit being adjustable dependent on at least a number of selected output ports.