The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2025
Filed:
Jul. 21, 2023
Applicant:
Vuereal Inc., Waterloo, CA;
Inventors:
Gholamreza Chaji, Waterloo, CA;
Ehsanollah Fathi, Waterloo, CA;
Hossein Zamani Siboni, Waterloo, CA;
Assignee:
VueReal Inc., Waterloo, CA;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 25/16 (2023.01); H01L 29/40 (2006.01); H01L 33/00 (2010.01); H01L 27/15 (2006.01); H01L 33/20 (2010.01); H01L 33/44 (2010.01);
U.S. Cl.
CPC ...
H01L 33/0041 (2013.01); H01L 25/167 (2013.01); H01L 29/401 (2013.01); H01L 29/42312 (2013.01); H01L 33/0037 (2013.01); H01L 27/156 (2013.01); H01L 33/007 (2013.01); H01L 33/0093 (2020.05); H01L 33/20 (2013.01); H01L 33/44 (2013.01); H01L 2933/0066 (2013.01);
Abstract
A micro device structure comprising at least part of an edge of a micro device is covered with a metal-insulator-semiconductor (MIS) structure, wherein the MIS structure comprises a MIS dielectric layer and a MIS gate conductive layer, at least one gate pad provided to the MIS gate conductive layer, and at least one micro device contact extended upwardly on a top surface of the micro device.