The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2025

Filed:

Oct. 14, 2020
Applicant:

Lumens Co., Ltd., Yongin-si, KR;

Inventors:

Soo Kun Jeon, Gyeonggi-do, KR;

Geun Mo Jin, Gyeonggi-do, KR;

Assignee:

Lumens Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/075 (2006.01); H01L 33/00 (2010.01); H01L 33/42 (2010.01); H01L 33/50 (2010.01); H01L 33/52 (2010.01); H01L 33/58 (2010.01); H01L 33/62 (2010.01);
U.S. Cl.
CPC ...
H01L 25/0753 (2013.01); H01L 33/0093 (2020.05); H01L 33/42 (2013.01); H01L 33/50 (2013.01); H01L 33/52 (2013.01); H01L 33/58 (2013.01); H01L 33/62 (2013.01); H01L 2933/0016 (2013.01); H01L 2933/0041 (2013.01); H01L 2933/005 (2013.01); H01L 2933/0058 (2013.01); H01L 2933/0066 (2013.01);
Abstract

The present disclosure relates to a semiconductor light emitting device and a method for manufacturing the same. The semiconductor light emitting device comprises: one or more light emitting units, each including a first semiconductor layer, an active layer and a second semiconductor layer sequentially formed on a growth substrate; an electrode unit including a first semiconductor layer having a first conductivity and a metal layer formed on the first semiconductor layer; and one or more bonding layers for electrically connecting to the light emitting units and electrode unit, respectively, wherein each bonding layer has a first region on which the light emitting units and the electrode unit are arranged, and a second region having a larger planar area than that of the first region and being electrically connected to an external substrate.


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