The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 11, 2025
Filed:
Sep. 14, 2023
Applicant:
Nagase & Co., Ltd., Osaka, JP;
Inventor:
Yoichiro Kurita, Tokyo, JP;
Assignee:
NAGASE & CO., LTD., Osaka, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2023.01); G11C 5/04 (2006.01); H01L 23/498 (2006.01); G06N 3/04 (2023.01); H01L 25/10 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0652 (2013.01); G11C 5/04 (2013.01); H01L 23/49833 (2013.01); G06N 3/04 (2013.01); H01L 25/105 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06527 (2013.01); H01L 2225/06531 (2013.01); H01L 2225/06534 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06555 (2013.01); H01L 2225/06572 (2013.01); H01L 2225/06593 (2013.01);
Abstract
An electronic device includes an interconnect layer, a second chip and a third chip provided on a first side of the interconnect layer, and a first chip provided on a second side of the interconnect layer. The interconnect layer includes conductive members connecting between the first chip and the second chip, and connecting between the first chip and the third chip, respectively. The interconnect layer does not include a conductive member directly connecting between the second chip and the third chip.