The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2025

Filed:

Aug. 26, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Motoki Shimizu, Yokohama Kanagawa, JP;

Kenji Sakurada, Yamato Kanagawa, JP;

Naoto Kumano, Yokohama Kanagawa, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/52 (2006.01); G11C 8/08 (2006.01); G11C 29/02 (2006.01); H03M 13/11 (2006.01);
U.S. Cl.
CPC ...
G11C 29/52 (2013.01); G11C 8/08 (2013.01); G11C 29/021 (2013.01); H03M 13/1125 (2013.01);
Abstract

A memory system includes a semiconductor memory device including a plurality of memory cells each configured to store data in a non-volatile manner according to a threshold voltage thereof and connected to a word line, and a controller configured to perform an error correction based on hard bit data and soft bit data read from the plurality of memory cells, generate a first table based on corrected data, determine a voltage difference between a first voltage and a second voltage, the first voltage being a voltage applied to the word line when the data being corrected is read, and correct the first table based on the voltage difference.


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