The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2025

Filed:

Aug. 30, 2022
Applicant:

Samsung Display Co., Ltd., Yongin-Si, KR;

Inventors:

Sunkwang Kim, Seoul, KR;

Kangmoon Jo, Hwaseong-si, KR;

Assignee:

Samsung Display Co., Ltd., Yongin-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/32 (2016.01); G09G 3/3233 (2016.01); H01L 25/075 (2006.01); H01L 33/50 (2010.01); H01L 33/54 (2010.01); H01L 33/62 (2010.01);
U.S. Cl.
CPC ...
G09G 3/32 (2013.01); G09G 3/3233 (2013.01); H01L 25/0753 (2013.01); H01L 33/505 (2013.01); H01L 33/54 (2013.01); H01L 33/62 (2013.01); G09G 2300/0852 (2013.01); G09G 2310/0275 (2013.01);
Abstract

A pixel includes: first to fourth driving transistors; a first light emitting diode connected to the first driving transistor; a second light emitting diode connected to the second driving transistor and spaced apart from the first light emitting diode in a first direction; a third light emitting diode connected to the third driving transistor and disposed between the first light emitting diode and the second light emitting diode; and a fourth light emitting diode connected to the fourth driving transistor and disposed between the first light emitting diode and the second light emitting diode, wherein a planar area of the first driving transistor is smaller than a planar area of each of the third and fourth driving transistors, a planar area of the second driving transistor is smaller than a planar area of each of the third and fourth driving transistors, and a first data signal is applied to the first and second driving transistors.


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