The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2025

Filed:

Aug. 16, 2023
Applicant:

Alibaba (China) Co., Ltd., Hangzhou, CN;

Inventors:

Lide Duan, Sunnyvale, CA (US);

Bowen Huang, New Haven, CT (US);

Qichen Zhang, Shanghai, CN;

Shengcheng Wang, Shanghai, CN;

Yen-Kuang Chen, Palo Alto, CA (US);

Hongzhong Zheng, Los Gatos, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/0811 (2016.01); G06F 12/0846 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0811 (2013.01); G06F 12/0848 (2013.01); G06F 2212/1021 (2013.01);
Abstract

A computer-implemented method for allocating memory bandwidth of multiple CPU cores in a server includes: receiving an access request to a last level cache (LLC) shared by the multiple CPU cores in the server, the access request being sent from a core with a private cache holding copies of frequently accessed data from a memory; determining whether the access request is an LLC hit or an LLC miss; and controlling a memory bandwidth controller based on the determination. The memory bandwidth controller performs a memory bandwidth throttling to control a request rate between the private cache and the last level cache. The LLC hit of the access request causes the memory bandwidth throttling initiated by the memory bandwidth controller to be disabled and the LLC miss of the access request causes the memory bandwidth throttling initiated by the memory bandwidth controller to be enabled.


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