The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2025

Filed:

Aug. 19, 2024
Applicant:

Rebellions Inc., Seongnam-si, KR;

Inventors:

Myunghoon Choi, Seongnam-si, KR;

Chang-Hyo Yu, Seongnam-si, KR;

Assignee:

REBELLIONS INC., Seongnam-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); G06F 21/57 (2013.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1417 (2013.01); G06F 21/575 (2013.01); G06F 13/4221 (2013.01); G06F 2213/0026 (2013.01);
Abstract

An electronic device comprises a main chiplet including a first memory and at least one sub-chiplet including a second memory, wherein the main chiplet is configured to initialize a first interface for inter-chiplet connection based on first boot firmware stored in the first memory in response to receiving booting signal, acquire third boot firmware stored in an external memory, initialize a second interface for communication between an external device and the main chiplet based on the third boot firmware, set a configuration for interconnection between the main chiplet and the at least one sub-chiplet, initialize a third memory included in the main chiplet, and load at least one of an application firmware or an operating system to the third memory, and the at least one sub-chiplet is configured to initialize the first interface based on second boot firmware stored in the second memory in response to receiving the booting signal.


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