The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2025

Filed:

Dec. 20, 2023
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Aaron John Nygren, Boise, ID (US);

Karthik Gopalakrishnan, Cupertino, CA (US);

Tsun Ho Liu, Boston, MA (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 1/08 (2006.01); G06F 1/10 (2006.01); G06F 3/06 (2006.01); G11C 11/4076 (2006.01); G06F 1/3234 (2019.01); G06F 1/3237 (2019.01); G06F 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/4076 (2013.01); G06F 1/08 (2013.01); G06F 1/10 (2013.01); G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0671 (2013.01); G06F 1/3237 (2013.01); G06F 1/3275 (2013.01); G06F 12/00 (2013.01); G06F 13/00 (2013.01);
Abstract

A memory controller monitors memory command selected for dispatch to the memory and sends commands controlling a read clock state. A memory includes a read clock circuit and a mode register. The read clock circuit has an output for providing a hybrid read clock signal in response to a clock signal and a read clock mode signal. The read clock circuit provides the hybrid read clock signal as a free-running clock signal that toggles continuously, and as a strobe signal that is active only in response to the memory receiving a read command.


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