The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2025

Filed:

Oct. 25, 2024
Applicant:

Georgios Konstadinidis, San Jose, CA (US);

Inventor:

Georgios Konstadinidis, San Jose, CA (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06J 1/00 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
G06J 1/00 (2013.01); H03M 1/1245 (2013.01);
Abstract

A hardware-implemented hybrid analog-digital mixed-mode matrix multiply-add processing element (PE) for machine learning (ML) applications is disclosed. The hardware-implemented hybrid analog-digital mixed-mode matrix multiply-add PE for ML applications involves using Fin Field-Effect Transistors ('FinFETs'), which provide excellent sub-threshold operation, thereby reducing power requirements, and use variation minimization strategies to improve the overall accuracy. In this way, hybrid analog-digital mixed-mode matrix multiply-add calculations are efficient, low power, and accurate, with the processing element itself in a relatively small surface area.


Find Patent Forward Citations

Konstadinidis, Georgios. (2025). Hardware-implemented hybrid analog-digital mixed-mode matrix multiply-add processing element for machine learning applications (U.S. Patent No. 12242906). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12242906

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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