The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2025

Filed:

Nov. 29, 2023
Applicant:

Renesas Electronics America Inc., Milpitas, CA (US);

Inventors:

Zhihan Zhang, Shanghai, CN;

Yuan Zhang, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 1/06 (2006.01); G06F 1/10 (2006.01); G06F 1/12 (2006.01); G11C 7/22 (2006.01); G11C 7/24 (2006.01);
U.S. Cl.
CPC ...
G06F 1/06 (2013.01); G06F 1/10 (2013.01); G06F 1/12 (2013.01); G11C 7/22 (2013.01); G11C 7/24 (2013.01);
Abstract

In an embodiment, an apparatus an apparatus including a memory module is described. The memory module can include a plurality of memory ranks and a register clock driver (RCD) coupled to the plurality of memory ranks. The RCD can include a receiver configured to receive a chip select signal for selecting one or more memory ranks. The RCD can further include a logic circuit coupled to the receiver, and an output driver coupled to the logic circuit. The RCD can further include a loopback circuit configured to sample the chip select signal from one or more of a first sampling point between the receiver and the logic circuit and a second sampling point between the logic circuit and the output driver.


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