The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2025

Filed:

Nov. 14, 2022
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Arunvenkatesh Alagappan, Cupertino, CA (US);

Soheil Golara, San Jose, CA (US);

Seyedeh Sedigheh Hashemi, Los Altos, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G01R 23/02 (2006.01); G01R 23/09 (2006.01); G01R 23/10 (2006.01); H03K 21/02 (2006.01);
U.S. Cl.
CPC ...
G01R 23/02 (2013.01); G01R 23/09 (2013.01); G01R 23/10 (2013.01); H03K 21/02 (2013.01);
Abstract

An integrated circuit can include frequency monitoring circuitry. The frequency monitoring circuitry may include a voltage based frequency monitoring circuit for monitoring an input clock signal having an input clock frequency within a first set of frequencies and a coarse frequency monitoring circuit for monitoring an input clock signal having an input clock frequency within a second set of frequencies different than the first set of frequencies. The voltage based frequency monitoring circuit can be configured to generate an output voltage having a first value when the input clock frequency is greater than a reference frequency and having a second value when the input clock frequency is less than the reference frequency. The coarse frequency monitoring circuit can include a reference counter and an input clock counter that generates a count value used to compute the input clock frequency.


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