The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 04, 2025

Filed:

Dec. 03, 2018
Applicant:

Hewlett-packard Development Company, L.p., Spring, TX (US);

Inventors:

James Michael Gardner, Corvallis, OR (US);

Scott A. Linn, Corvallis, OR (US);

Stephen D. Panshin, Corvallis, OR (US);

Jefferson P. Ward, Vancouver, WA (US);

David Owen Roethig, Vancouver, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/44 (2013.01); B41J 2/175 (2006.01); G06F 21/74 (2013.01); G06F 21/85 (2013.01);
U.S. Cl.
CPC ...
B41J 2/17526 (2013.01); B41J 2/17566 (2013.01); G06F 21/44 (2013.01); G06F 21/74 (2013.01); G06F 21/85 (2013.01);
Abstract

In an example, a logic circuit comprising a communications interface including a data contact to communicate via a communications bus, an enablement contact, separate from the communication interface, to receive an input to enable the logic circuit, and at least one memory register, comprising at least one reconfigurable address register. The logic circuit may be configured, such that, when enabled, it responds to communications sent via the communication bus which are addressed to the address held in a reconfigurable address register.


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