The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2025

Filed:

Sep. 21, 2023
Applicant:

Juniper Networks, Inc., Sunnyvale, CA (US);

Inventors:

Raja Kommula, Cupertino, CA (US);

Rahul Gupta, Kanpur, IN;

Ganesh Byagoti Matad Sunkada, Bengaluru, IN;

Tarun Banka, Milpitas, CA (US);

Thayumanavan Sridhar, Sunnyvale, CA (US);

Raj Yavatkar, Los Gatos, CA (US);

Assignee:

Juniper Networks, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 9/40 (2022.01); G06N 5/022 (2023.01); G06N 20/20 (2019.01); H04L 41/14 (2022.01); H04L 41/16 (2022.01); H04L 41/5009 (2022.01); H04L 43/0811 (2022.01); H04L 43/0888 (2022.01);
U.S. Cl.
CPC ...
H04L 63/0263 (2013.01); G06N 5/022 (2013.01); G06N 20/20 (2019.01); H04L 41/14 (2013.01); H04L 41/16 (2013.01); H04L 41/5009 (2013.01); H04L 43/0811 (2013.01); H04L 43/0888 (2013.01); H04L 63/0236 (2013.01); H04L 63/0245 (2013.01); H04L 63/1416 (2013.01);
Abstract

Example systems, methods, and storage media are described. An example network system includes processing circuitry and one or more memories coupled to the processing circuitry. The one or more memories are configured to store instructions which, when executed by the processing circuitry, cause the network system to obtain telemetry data. The instructions cause the network system to determine, based on the telemetry data, that an application running on server processing circuitry does not meet at least one service level agreement (SLA) requirement, the server processing circuitry not including processing circuitry resident on a network interface card (NIC). The instructions cause the network system to, based on the application not meeting the at least one SLA requirement, determine to offload at least one component of the application from the server processing circuitry to the processing circuitry resident on the NIC.


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