System and method for memory bad block mamagement

Abstract

A memory system includes a memory module and a memory controller to control semiconductor memory devices in the memory module. Each of the semiconductor memory devices provides the memory controller with an address of at least a defective memory cell row unrepairable with a redundancy resource in a memory cell array as unrepairable address information. The memory controller allocates a portion of a normal cell regions of at least one of the semiconductor memory devices as a reserved region, and remaps first and second unrepairable addresses to first and second physical addresses of the reserved region in response to first and second host physical addresses from a host matching the first and second unrepairable addresses, respectively. The first physical address and the second physical address are consecutive.