The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2025

Filed:

May. 12, 2022
Applicant:

Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken, JP;

Inventors:

Hideaki Shishido, Kanagawa, JP;

Naoto Kusumoto, Kanagawa, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10K 59/122 (2023.01); G02F 1/133 (2006.01); G06F 3/041 (2006.01); G09G 3/20 (2006.01); G09G 3/3225 (2016.01); G09G 3/3233 (2016.01); G09G 3/3258 (2016.01); G09G 3/36 (2006.01); H01L 29/786 (2006.01); H10K 10/84 (2023.01); H10K 50/814 (2023.01); H10K 59/121 (2023.01); H10K 59/128 (2023.01); H01L 27/12 (2006.01); H10K 50/115 (2023.01); H10K 71/20 (2023.01);
U.S. Cl.
CPC ...
H10K 59/122 (2023.02); G02F 1/13306 (2013.01); G06F 3/0412 (2013.01); G09G 3/2092 (2013.01); G09G 3/3225 (2013.01); G09G 3/3233 (2013.01); G09G 3/3258 (2013.01); G09G 3/3648 (2013.01); H01L 29/7869 (2013.01); H10K 10/84 (2023.02); H10K 50/814 (2023.02); H10K 59/1213 (2023.02); H10K 59/128 (2023.02); G02F 2201/44 (2013.01); G02F 2203/02 (2013.01); G06F 3/041 (2013.01); G06F 2203/04103 (2013.01); G09G 2310/0291 (2013.01); H01L 27/1225 (2013.01); H10K 50/115 (2023.02); H10K 71/231 (2023.02);
Abstract

A display device with a narrow bezel is provided. The display device includes a pixel circuit and a driver circuit which are provided on the same plane. The driver circuit includes a selection circuit and a buffer circuit. The selection circuit includes a first transistor. The buffer circuit includes a second transistor. The first transistor has a region overlapping with the second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. One of a source and a drain of the second transistor is electrically connected to the pixel circuit.


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