The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2025
Filed:
Aug. 11, 2020
Itabashi Seiki Co., Ltd., Tokyo, JP;
ITABASHI SEIKI CO., LTD., Tokyo, JP;
Abstract
[Object] Provided is a printed circuit board ensuring a degree of freedom in circuit design and unlikely to cause a circuit connection failure. [Solving Means] A middle interlayer circuit, an upper surface side interlayer circuit, and a lower surface side interlayer circuitare formed from a connection surface-less integral conductor. In addition, a connection surfacebetween the upper surface side interlayer circuitand an upper surface side surface layer circuitand a connection surfacebetween the lower surface side interlayer circuitand a lower surface side surface layer circuitlack a connection surface in a plate thickness direction, and thus a satisfactory connection state is achieved. Accordingly, a first circuitis unlikely to cause a connection failure. In addition, the upper surface side interlayer circuitand the lower surface side interlayer circuitcan be disposed at misaligned positions in the plane direction of the printed circuit board, and thus the degree of freedom in circuit design increases. Plane circuitsandnot connected to the first circuit can be disposed with insulating layersandsandwiched below the upper surface side interlayer circuit 12 or above the lower surface side interlayer circuit