The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 18, 2025
Filed:
Aug. 11, 2022
Realtek Semiconductor Corp., HsinChu, TW;
Yuefeng Chen, Suzhou, CN;
Realtek Semiconductor Corp., HsinChu, TW;
Abstract
A method for performing a power disturbing operation to reduce a success rate of cryptosystem power analysis attack, an associated cryptosystem processing circuit and an associated electronic device are provided. The method includes: generate at least one random number; generating a plurality of power disturbing parameters respectively corresponding to a plurality of bit calculation phases according to the at least one random number, where the plurality of bit calculation phases represent a plurality of cryptosystem processing phases related to a predetermined cryptosystem, and correspond to a plurality of private key bits of a private key, respectively; and according to the plurality of power disturbing parameters, enabling at least one predetermined circuit of a plurality of predetermined circuits in the plurality of bit calculation phases, respectively, to use power corresponding to the plurality of power disturbing parameters to perform the power disturbing operation in the plurality of bit calculation phases, respectively.