The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 18, 2025

Filed:

Jul. 08, 2022
Applicant:

Stmicroelectronics (Tours) Sas, Tours, FR;

Inventors:

Ludovic Fallourd, Louans, FR;

Christophe Serre, Saint Cyr sur Loire, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 24/94 (2013.01); H01L 21/78 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 2224/1132 (2013.01); H01L 2224/13017 (2013.01); H01L 2224/13026 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13139 (2013.01);
Abstract

A method for manufacturing electronic chips includes depositing, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, a protective resin. The method includes forming, in the protective resin, at least one cavity per integrated circuit, in contact with an upper face of the integrated circuit. Metal connection pillars are formed by filling the cavities with metal. The integrated circuits are separated into individual chips by cutting the protective resin along cut lines extending between the metal connection pillars.


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